Couverture de A Jittered-Sampling Correction Technique of ADCs
Titre du livre:

A Jittered-Sampling Correction Technique of ADCs

Reduction in jittered-sampling effects by the means of linear approximation

LAP LAMBERT Academic Publishing (25-03-2011 )

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ISBN-13:

978-3-8443-1967-5

ISBN-10:
3844319670
EAN:
9783844319675
Langue du livre:
Français
texte du rabat:
In Analogue to Digital Converters (ADCs) jittered sampling raises the noise floor; this leads to a decrease in its Signal to Noise ratio (SNR) and its effective number of bits (ENOB). This research studies a technique that compensate for the effects of jittered. A thorough understanding of sampling in various data converters is complied. A novel design technique based on linear approximation is proposed to counter the effects of clock jitter in ADCs. The system consists of a circuit that performs linear approximation of the incoming signal to an ADC at the time a possibly jittered clock is ticked to estimate the correct value of the sample. Since jitter is essentially caused by phase noise, the jitter is itself estimated using phase demodulation. To avoid introduction of even more noise sources passive and differential approaches have been selected. This approach resulted in improvement in the SNR of 8.09 dB. This corresponds to 1.34 bits of resolution gain in ENOB.
Maison d'édition:
LAP LAMBERT Academic Publishing
Site Web:
https://www.lap-publishing.com/
de (auteur) :
Jamiil Tourabaly
Numéro de pages:
96
Publié le:
25-03-2011
Stock:
Disponible
Catégorie:
Électronique, Electrotechnique, Technologie des communications
Prix:
4,206.16 руб
Mots-clés:
Analogue to Digital Converter, Jitter, Sampling., Sampling

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